Output is set to 1.0 upon receiving a trigger in the trig input, and to 0.0 upon receiving a trigger in the reset input. Once the flip flop is set to zero or one further triggers in the same input are have no effect. One use of this is to have some precipitating event cause something to happen until you reset it.
If both inputs receive a trigger at the same time, the reset input takes precedence. The output will be 0. See the examples below.
| trig |
The trigger that sets output to 1. Trigger can be any signal. A trigger happens when the signal changes from non-positive to positive. |
| reset |
The trigger that sets output to 0. Trigger can be any signal. A trigger happens when the signal changes from non-positive to positive. |
Here, 'reset' is triggered twice as often as 'trig'. Since 'trig' is always matched by a 'reset', the output is 0. (If 'trig' took precedence, you would have a 50%-duty-cycle pulse wave.)
You can reverse this behavior, by reversing the inputs so that SetResetFF is triggered twice as often as resetting. This results in a signal that is 0 initially and switches to 1 halfway through the cycle: reset, then trigger. To make it trigger, then reset, invert the phase: 1 - SetResetFF.